Difference between revisions of "Mesa Electronics 7i76 Step/Direction + I/O Daughter Card"

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A 25-pin daughtercard for Mesa FPGA boards. There is are separate sourcing and sinking editions of the board for the field I/O.
 
A 25-pin daughtercard for Mesa FPGA boards. There is are separate sourcing and sinking editions of the board for the field I/O.
 +
 +
== Wiring ==
 +
 +
* [http://www.mesanet.com/pdf/parallel/7i76man.pdf#page=9 Page 9] (3 in the PDF) shows the connector locations
 +
* [http://www.mesanet.com/pdf/parallel/7i76man.pdf#page=10 Page 10] (4 in the PDF) shows the FPGA side DB-25 pinout
 +
* [http://www.mesanet.com/pdf/parallel/7i76man.pdf#page=11 Pages 11-12] (5-6 in the PDF) show the TB2/TB3 step/direction pinouts
 +
* [http://www.mesanet.com/pdf/parallel/7i76man.pdf#page=12 Page 12] (6 in the PDF) shows the TB3 encoder input pinout
 +
* [http://www.mesanet.com/pdf/parallel/7i76man.pdf#page=12 Page 12] (6 in the PDF) shows the TB3 Smart Serial (RS-422) pinout
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* [http://www.mesanet.com/pdf/parallel/7i76man.pdf#page=17 Page 17] (11 in the PDF) shows the TB3 Smart Serial (RS-422) pinout with CAT5 wiring scheme
 +
* [http://www.mesanet.com/pdf/parallel/7i76man.pdf#page=13 Page 13] (7 in the PDF) shows the TB4 spindle output pinout
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* [http://www.mesanet.com/pdf/parallel/7i76man.pdf#page=14 Pages 14-15] (8-9 in the PDF) show the TB5 field I/O pinout
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* [http://www.mesanet.com/pdf/parallel/7i76man.pdf#page=16 Page 16] (10 in the PDF) shows the TB1 field power pinout
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 +
Give that all of the FPGA pins are being driven to +5V (high), the 7i76 has the following output levels with respect to digital ground:
 +
 +
{| class="wikitable"
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! TBx Pin
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! Voltage
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|-
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| STEP/DIRx+
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| +5V (high)
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|-
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| STEP/DIRx-
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| 0V (low)
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|-
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| RS-422 TX+
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| 0V (low)
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|-
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| RS-422 TX-
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| +5V (high)
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|-
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| RS-422 RX+
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| +2.5V (invalid)
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|-
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| RS-422 RX-
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| +2.5V (invalid)
 +
|}
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 +
== Dimensions ==
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 +
* [http://www.mesanet.com/pdf/parallel/7i76man.pdf#page=58 Page 58] (52 in the PDF) shows a dimensional diagram
  
 
== Bill of Materials ==
 
== Bill of Materials ==
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| [https://www.digikey.com/en/products/detail/microchip-technology/DSPIC33FJ16GS402-I-SO/2059890 Microchip DSPIC33FJ16GS402-I/SO]
 
| [https://www.digikey.com/en/products/detail/microchip-technology/DSPIC33FJ16GS402-I-SO/2059890 Microchip DSPIC33FJ16GS402-I/SO]
 
|-
 
|-
| U9,U12
+
| U9
 
| [onsemi logo] ACT 540 PSLJ [TSSOP-20]
 
| [onsemi logo] ACT 540 PSLJ [TSSOP-20]
 
| [https://www.digikey.com/en/products/detail/onsemi/MC74ACT540DTR2G/1479746 onsemi MC74ACT540DTR2G]
 
| [https://www.digikey.com/en/products/detail/onsemi/MC74ACT540DTR2G/1479746 onsemi MC74ACT540DTR2G]
 +
|-
 +
| U12
 +
| [onsemi logo] ACT 541 PBLH [TSSOP-20]
 +
| [https://www.digikey.com/en/products/detail/onsemi/MC74ACT541DTR2G/920949 onsemi MC74ACT541DTR2G]
 
|-
 
|-
 
| U10,U11,U14,U15
 
| U10,U11,U14,U15
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[http://store.mesanet.com/index.php?route=product/product&product_id=119 7i76 | Mesa Web Store]
 
[http://store.mesanet.com/index.php?route=product/product&product_id=119 7i76 | Mesa Web Store]
  
[http://store.mesanet.com/index.php?route=product/product&product_id=322 7i76 | Mesa Web Store]
+
[http://store.mesanet.com/index.php?route=product/product&product_id=322 7i76D | Mesa Web Store]

Latest revision as of 10:59, 20 October 2022

Overview

A 25-pin daughtercard for Mesa FPGA boards. There is are separate sourcing and sinking editions of the board for the field I/O.

Wiring

  • Page 9 (3 in the PDF) shows the connector locations
  • Page 10 (4 in the PDF) shows the FPGA side DB-25 pinout
  • Pages 11-12 (5-6 in the PDF) show the TB2/TB3 step/direction pinouts
  • Page 12 (6 in the PDF) shows the TB3 encoder input pinout
  • Page 12 (6 in the PDF) shows the TB3 Smart Serial (RS-422) pinout
  • Page 17 (11 in the PDF) shows the TB3 Smart Serial (RS-422) pinout with CAT5 wiring scheme
  • Page 13 (7 in the PDF) shows the TB4 spindle output pinout
  • Pages 14-15 (8-9 in the PDF) show the TB5 field I/O pinout
  • Page 16 (10 in the PDF) shows the TB1 field power pinout

Give that all of the FPGA pins are being driven to +5V (high), the 7i76 has the following output levels with respect to digital ground:

TBx Pin Voltage
STEP/DIRx+ +5V (high)
STEP/DIRx- 0V (low)
RS-422 TX+ 0V (low)
RS-422 TX- +5V (high)
RS-422 RX+ +2.5V (invalid)
RS-422 RX- +2.5V (invalid)

Dimensions

  • Page 58 (52 in the PDF) shows a dimensional diagram

Bill of Materials

Name Marking Part
U2 [intersil logo] ISL32174 EIBZ W1932AAUS [SOIC-16] Renesas ISL32174EIBZ
U3 NXP 74HCT14D 46560037 YXD1751F [SOIC-14] NXP 74HCT14D
U4,U5 [onsemi logo] NCV7608 [SOIC-28] onsemi NCV7608DWR2G
U6 [TI logo] 89AQCSK G4 26LS32AC [SOIC-16] Texas Instruments AM26LS32ACD
U7 [Analog Devices logo] 121N0BR #935* 86322 [SOIC-8] Analog Devices ADUM121N0BRZ
U8 [Microchip logo] dsPIC33FJ16GS 402-I/SO (e3) 1925YJK [SOIC-28] Microchip DSPIC33FJ16GS402-I/SO
U9 [onsemi logo] ACT 540 PSLJ [TSSOP-20] onsemi MC74ACT540DTR2G
U12 [onsemi logo] ACT 541 PBLH [TSSOP-20] onsemi MC74ACT541DTR2G
U10,U11,U14,U15 [TI logo] 8CAG0YM LV4051A G4 [SOIC-16] Texas Instruments SN74LV4051ADR
U13 [onsemi logo] ACT04 PACL09 [SOIC-14] onsemi 74ACT04SC
U16 NXP HEF4001BT CKX97806 TXD16224 [SOIC-14] NXP HEF4001BT
U17 [I logo] S5230 PMIYE [SOIC-8] onsemi NE5230DR2G
O1,O2 [Toshiba logo] 837 P127 Toshiba TLP127TPRUF
O3 [onsemi logo] H11L1 931Q [DIP-6] onsemi H11L1
P1 AMP 171 04? 5747846-4 TE 5747846-4
TB1,TB4 8-position 3.5mm pitch pluggable terminal block header Phoenix Contact 1843664
TB2,TB3,TB5,TB6 24-position 3.5mm pitch pluggable terminal block header
W1-W6 3-position 2.54mm pitch header for jumper Adam Tech PH1-03-UA

Online Resources

7i76/7i76D Manual

7i76 | Mesa Web Store

7i76D | Mesa Web Store